- 1. Design Flow in Synthagate
- 2. ASM in GUI or SystemC
- 3. Time in ASM
- 4. Transformations of ASMs
- 5. Behavior Synthesis
- 6. RTL Design
Time in ASM
- To describe time in ASM let’s look at ASM in Fig. 1.Each operator can contain one, two, three etc. micro operations written in the same operator vertex. These micro operations are implemented simultaneously at the same clock.
- Two sequential operators, as Y6 and Y9 in Fig. 1, are implemented at two sequential clocks.
- Two operators with any number of conditional vertices between them, as Y5 and Y9 in Fig. 1, are implemented at two sequential clocks.
Figure 1. Example of sub ASM PackByte
If ASM contains a generalized operator, the time of its implementation depends on its structure. Changing such operator it is possible to change the speed of the designed system and its area on the chip.