- 1. Design Flow in Synthagate
- 2. ASM in GUI or SystemC
- 3. Time in ASM
- 4. Transformations of ASMs
- 5. Behavior Synthesis
- 6. RTL Design
Functional Specifications. To design the behavior (TLM) description of digital system the designer should not define each port and signal. The special Synthagate’s program FuncSpecBuilder creates an XML code of the functional specification and the designer should only insert the length of several ports and signals (not all, only a very small part of them) in this specification in the dialog mode Funcmi.spec.
Behavior description of the design system. With Functional ASM Funcmi and the functional specification as an input, Synthagate automatically constructs the behavior description of the whole design system – a virtual FSM in VHDL Funcmi.vhd and in System C Funcmi.cpp .
After preparing the test bench at the behavior level the designer can simulate the functional project with any simulation tool. The same test bench can be used later on the last stage of design – after top design at the structural (RTL) level. For simulation at the High Level designer can choose Funcmi.vhd (VHDL representation) or Funcmi.cpp (System C).