- 1. Design Flow in Synthagate
- 2. ASM in GUI or SystemC
- 3. Time in ASM
- 4. Transformations of ASMs
- 5. Behavior Synthesis
- 6. RTL Design
Data Path design
External specifications. In Data path design Synthagate uses external specifications in XML ExtSpec.xml prepared automatically by program ExtSpecBuilder. You can download this program from our site.
Automatic generation of components. Synthagate automatically generates VHDL codes for components of Data Path. In our example, Synthagate have constructed the following components:
If a designer would like to use some “exotic” components or predesigned IP cores, he must put their RTL codes in folder Components before the design. Later these components will be included in the library of automatically generated units. In our example we used core memory from Altera Ram65536x8.vhd.
Generation VHDL code for Data Path. At the last step of Data Path design Synthagate automatically instantiates these components in the Data Path Dp.vhd.
Control Unit design
Synthagate automatically creates the RTL code of Control unit Structm.vhd. Its input signals are feedbacks from the Data path and some input signals of the digital system, its outputs are micro operations implementing in the Data path and some output signals of the digital system.
At the last stage, Synthagate creates the code for the top level automatically combining Control Unit and Data Path Top.vhd .
During design Synthagate automatically creates documents in folders corresponding to each design stage. These documents can be used to prepare the project documentation. In the case of designer’s mistakes at the initial stages of the project these documents allow to come back very fast from any design stage to the previous stages to fix the possible problems.